Yeap, that’s all it is plus the PCB and accessories. Looking at it, looks like a 74HC00 - quad NAND gates, 74HC14 - Schmitt trigger inverters, 74HC74 - A dual D flip-flop, and a 74HC153 - dual 4 input mux.
The clock isn’t even a 555, just an RC circuit passed through the Schmitt trigger and the provided hardware XOR is where our NANDs come in.
It’s a neat little project but I think good CPU lessons need to have a MAR/MDR/CIR and show the fetch, decode, and execute cycle. Because a lot of modern concepts derive from asking the question of “how do I optimize that?”
Yeap, that’s all it is plus the PCB and accessories. Looking at it, looks like a 74HC00 - quad NAND gates, 74HC14 - Schmitt trigger inverters, 74HC74 - A dual D flip-flop, and a 74HC153 - dual 4 input mux.
The clock isn’t even a 555, just an RC circuit passed through the Schmitt trigger and the provided hardware XOR is where our NANDs come in.
It’s a neat little project but I think good CPU lessons need to have a MAR/MDR/CIR and show the fetch, decode, and execute cycle. Because a lot of modern concepts derive from asking the question of “how do I optimize that?”